Teaching Learning Centre Indian Institute of Technology Hyderabad (Under PMMMNMTT, MHRD)
Title
Advanced Memory System Architecture
Contents :
Principles of designing memory hierarchy and a brief background on caches. Background and management techniques for the following memory technologies: Domain wall (racetrack) memory, stacked DRAM cache, eDRAM cache, STT-RAM, PCM, ReRAM, DRAM (for main memory) and Flash (for secondary storage). Comparison of memory technologies and suitability for designing processor components.
Bio of the speaker :
Sparsh Mittal received the B.Tech degree in electronics and communications engineering (ECE) from IIT, Roorkee, India and the Ph.D. degree in computer engineering from Iowa State University (ISU), USA. He has worked as a post-doctoral research associate at Oak Ridge National Lab (ORNL), USA for 3 years. Dr. Sparsh was the topper of ECE batch in B.Tech final year and has received fellowship from ISU and performance award from ORNL. He has published more than 60 papers in top conferences and journals. His research has been covered by several technical news websites, e.g. Phys.org, InsideHPC 1, InsideHPC 2,InsideHPC 3, Primeur Magazine, StorageSearch, Data-Compression.info,TechEnablement, ScientificComputing, SemiEngineering (semiconductor engineering), ReRAM forum and HPCWire. He has given invited talks at ISC Conference (Germany), University of Michigan and New York University. His webpage is https://iith.academia.edu/SparshMittal
Date:4th March 2017 (Saturday) 09:30 AM to 5:00 PM
Venue: IIT Hyderabad Kandi
Steps for Registration
| Name of the Bank | State Bank of India |
| Branch Name | IIT Kandi |
| Account Holder Name | IIT Hyderabad R&D |
| Account Number | 30859878032 |
| IFSC Code | SBIN0014182 |
| Branch Code | 14182 |